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Mr. Tech Dweeb Answers

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Q: What is the status of the buried capacitance (ZBC-2000) patents? I would like to use single-ply 106 cores between planes without paying extra cost to use the licensed ZBC trademark materials.

A:

Mr. Tech Dweeb is by no means a lawyer, and is not qualified to offer legal opinions. The information following is not intended to cover any legal groundwork that you would need to research on your own. However when simply incorporated into a multilayer build, the use of 106 core does not violate the SCI-Sanmina patent. A core (no pun intended) concept of the patent is the use of the RTF foil that has the "teeth" facing away from the dielectric. This process allows the foil and dielectric to approximate the formulas for a parallel plate capacitor. Cores of this type are tightly controlled and sold only to licensed fabricators of the Sanmina patent. This is true even if the core has an entirely different purpose.

In the case of the 106 core of standard production, the teeth of the foil face inward toward the dielectric. For this reason, using the core in a design that does not specifically state it is to achieve a capacitance effect does not appear to be a violation. However, as you move from just use of the core to asking the fabricator to provide some type of complex impedance validation, you are out on "thin ice".

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Q:

What is the best way to very precisely locate a SMT component in reference to a drilled hole on a PCB?

A:

Very good question! MTD will assume that you mean SMT “pad”, not component.

An easily misunderstood portion of the PCB fabrication process is that (to the fabricator) the drilled holes and the outer layer artwork (SMT pads) are two separate operations each with its own tolerance.

The fabricator focuses on two things:

Mechanical Operations by CNC-type equipment

The fabricator will drill or route the PCB tomeet the dimensions within a mechanical drawing to the tolerance prescribed by GDT (General Dimensioning and Tolerance). This tolerance is usually based upon the precision (number of decimal places) in the mechanical drawing for features (holes, edges, slots, etc.). These drilling systems position to within 0.5 mil of true position. However, they are not drilling a perfect medium. The layers of copper, glass weave, and epoxy cause drill wander. This position error increases with the number of panels that are stacked for drilling. Fabricators usually match the drill wander to the required annular ring by reducing stack height (which increases drilling cost).

Photographic operations by film or Laser Direct Imaging

The fabricator registersthe (photographically applied) via pads to the (drilled) plated-thru holes based upon the annular ring requirements for the via holes. If the customer does not supply a specification, then the annular ring is defined by the required IPC-600 Class (1,2,3). Pads without plated-thru holes (SMT pads) are not of great concern to the fabricator. Their final position is determined solely by the small adjustments the fabricator must make to achieve the annular ring of the via holes. As they adjust the pattern for the vias, the entire artwork moves the same amount in X,Y, or theta.

A dimensioned drawing is not the answer

For the reasons above, putting a dimension on a fabrication drawing will not be successful. Should the customer supply a mechanical drawing that gives a dimension and tolerance from a drilled hole to a photographically applied pad, the fabricator will take exception. They do not have any means to determine their compliance with a dimension and tolerance until the PCB has completed most of the fabrication process. If they are out of specification, the board is “scrap”.

Engage with the Fabricator

If the customer must have a tight relationship between a drilled hole and an SMT pad, there are some options. In each case, the customer would need to work directly with the engineering department of the selected fabricator to develop a process that can deliver the desired relationship. In all cases, compromises must be made.

As a starting point with the selected fabricator, MTD would suggest that the pads of the via holes be increased, and that Laser Direct Imaging be used. There is also the possibility of using Solder Mask Defined pads and then an LDI system to image the solder mask.